Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
The use of programmable hardware, such as Field Programmable Gate Arrays (FPGAs), can yield substantial benefits in energy efficiency and processing speed in computing devices. FPGAs can be programmed with coprocessors that specialize in executing certain types of operations, for example video decoding operations and encryption/decryption operations, among others. Coprocessors can often process their specialized operations more efficiently than general purpose processors. Computer systems may be adapted to use coprocessors to process the specialized operations for which they are programmed, while other computing tasks may be processed by general purpose processors such as processors in a computer's Central Processing Unit (CPU).
Computer systems, and servers in data centers as one example, may implement virtualized environments in which multiple Virtual Machines (VMs) may run simultaneously while sharing the same hardware. In data centers, virtualization may be used to consolidate data center equipment, lower capital and operational expenses, and also reduce energy consumption. The multiple VMs may use multiple coprocessors, which may be loaded onto programmable hardware such as FPGAs. The programmable hardware may be implemented within, or otherwise accessible to, servers running the multiple VMs. The multiple coprocessors for the multiple VMs may share available FPGA space, and in some cases, the multiple VMs may compete for available FPGA space.
Coprocessors may be allocated to non-overlapping physical regions within an FPGA, and these regions may be of different shapes and sizes. As VMs and their associated coprocessors are loaded and unloaded, FPGA fragmentation can occur, leading to inefficient use of FPGA resources. FPGA fragmentation is similar in some respects to disk fragmentation which results from continual writing and deleting of files.
Another useful analogy for FPGA fragmentation is a factory that produces rectangular blocks of different sizes which are stored before shipping. There are a limited number of drawers in which the blocks can be placed. When a new block is produced, the factory chooses any available place in a drawer where the block fits. However, blocks don't leave the drawers in the same order they arrive. After many blocks have come and gone, the arrangement becomes inefficient with many pockets of unused space between the blocks.
Similar to the factory analogy, when a VM that uses a coprocessor is loaded on a server, some FPGA resource allocation techniques simply choose any FPGA region in which the coprocessor fits, and load the coprocessor in the chosen FPGA region. On the other hand, when a VM that uses a coprocessor is terminated, the FPGA region occupied by the corresponding terminated coprocessor becomes available. After many coprocessors have come and gone, the arrangement becomes inefficient with many regions of unused space between loaded coprocessors.
As a result of fragmentation, some coprocessors may be excluded from an FPGA that has sufficient resources for the excluded coprocessors. However, the available FPGA resources may be fragmented and cannot fit the excluded coprocessors without terminating other coprocessors. Excluded coprocessors may be swapped into an FPGA by terminating other coprocessors to make room in the FPGA. However, swapping coprocessors takes time, and results in coprocessor “down time” during the swap.
There is a need in the industry to more effectively leverage the benefits of programmable hardware. By way of example, there is a need to increase utilization of programmable hardware resources by reducing fragmentation, there is a need to reduce coprocessor down time due to swapping coprocessors into FPGAs to meet the coprocessor needs of different VMs, and there is a need to reduce fragmentation and reduce coprocessor down time in ways that present net performance gains in computing systems.